Tài liệu the PCI Bus demystified phần 3

Cache line wrap mode only applies if a burst begins in the middle
of a cache line. When the end of the cache line is reached, the
address wraps around to the beginning of the cache line until the
entire line has been transferred. If the burst continues beyond this
point, the next transfer is to/from the same location in the next
cache line where the transfer began.
Here’s an example: Consider a cache line size of 16 bytes
(4 DWORDs) and a transfer that begins at location 8. The first
transfer is to location 8, the second to location C hex which is the
end of the cache line. The third data phase is to address 0 and the
fourth to address 4. If the burst continues, the next data phase will
be to location 18 hex.