Thưa các bạn. Cuốn sách này hướng dẫn các bạn cách sử dụng phần mềm ORCAD để thiết kế mạch nguyên lý và mạch in một cách chi tiết nhất, dễ hiểu nhất. Cuốn sách này được viết cho cả đối tượng là học sinh hoặc người đi làm. Nó giải thích từ các thành phần đơn giản nhất của mạch in đến những khái niệm chuyên sâu. Cuốn sách có nhiều hình vẽ minh họa một cách trực quan và dễ hiểu. Nó không chỉ giúp các bạn nhanh chóng làm chủ phần mềm ORCAD mà còn giúp các bạn nắm vững lý thuyết về thiết kế mạch in. INTRODUCTION XV ACKNOWLEDGMENTS XIX CHAPTER 1 INTRODUCTION TO PCB D ESIGN AND CAD .1 Computer-Aided Design and the OrCAD Design Suite 1 Printed Circuit Board Fabrication .2 PCB cores and layer stack-up .2 PCB fabrication process 4 Photolithography and chemical etching .5 Mechanical milling 8 Layer registration 9 Function of OrCAD Layout in the PCB Design Process .11 Design Files Created by Layout 14 Layout format fi les (.MAX) .14 Postprocess (Gerber) fi les .14 PCB assembly layers and fi les 14 CHAPTER 2 INTRODUCTION TO THE PCB D ESIGN F LOW BY E XAMPLE .17 Overview of the Design Flow 17 iii Table of ContentsCreating a Circuit Design with Capture .17 Starting a new project 17 Placing parts 20 Wiring (connecting) the parts 23 Creating the Layout netlist in Capture 23 Designing the PCB with Layout .25 Starting Layout and importing the netlist 25 Making a board outline 29 Placing the parts .31 Autorouting the board .32 Manual routing .32 Cleanup 34 Locking traces 34 Performing a design rule check .35 Postprocessing the board design for manufacturing .35 CHAPTER 3 P ROJECT S TRUCTURES AND THE L AYOUT T OOL S ET .39 Project Setup and Schematic Entry Details .39 Capture projects explained 39 Capture part libraries explained 42 Understanding the Layout Environment and Tool Set 43 Board technology fi les 43 The AutoECO utility 44 The session frame and Design window 46 The toolbar 47 Controlling the autorouter .57 Postprocessing and layer details .60 CHAPTER 4 I NTRODUCTION TO I NDUSTRY S TANDARDS .65 Introduction to the Standards Organizations .66 Contents ivInstitute for Printed Circuits (IPC-Association Connecting Electronics Industries) .66 Electronic Industries Alliance (EIA) 66 Joint Electron Device Engineering Council (JEDEC) 66 International Engineering Consortium (IEC) .67 Military Standards 67 American National Standards Institute (ANSI) .67 Institute of Electrical and Electronics Engineers (IEEE) 67 Classes and Types of PCBs 68 Performance classes 68 Producibility levels 68 Fabrication types and assembly subclasses 69 OrCAD Layout design complexity levels—IPC performance classes 69 IPC land pattern density levels 70 Introduction to Standard Fabrication Allowances .70 Registration tolerances .70 Breakout and annular ring control 70 PCB Dimensions and Tolerances 71 Standard panel sizes .71 Tooling area allowances and effective panel usage .72 Standard fi nished PCB thickness 72 Core thickness .73 Prepreg thickness 73 Copper thickness for PTHs and vias .73 Copper cladding/foil thickness .74 Copper Trace and Etching Tolerances 75 Standard Hole Dimensions .76 Soldermask Tolerance .77 End Note 77 Suggested reading 77 Other items of interest .77 Contents CHAPTER 5 I NTRODUCTION TO D ESIGN FOR M ANUFACTURING 79 Introduction to PCB Assembly and Soldering Processes 79 Assembly Processes 79 Manual assembly processes .79 Automated assembly processes (pick and place) .80 Soldering Processes 81 Manual soldering 81 Wave soldering .82 Refl ow soldering .84 Component Placement and Orientation Guide 85 Component Spacing for Through-hole Devices 86 Discrete THDs 86 Integrated circuit through-hole devices 86 Mixed discrete and IC through-hole devices 86 Holes and jumper wires 86 Component Spacing for Surface-Mounted Devices .86 Discrete SMDs .86 Integrated-circuit SMDs 86 Mixed discrete and IC SMDs .86 Mixed THD and SMD Spacing Requirements 86 Footprint and Padstack Design for PCB Manufacturability .94 Land Patterns for Surface-Mounted Devices 94 SMD padstack design .96 SMD footprint design .99 Land Patterns for Through-hole Devices 101 Footprint design for through-hole devices .101 Padstack design for through-hole devices 103 Hole-to-lead ratio .103 PTH land dimension (annular ring width) .104 Clearance between plane layers and PTHs .106 Soldermask and solder paste dimensions .107 Contents CHAPTER 6 PCB D ESIGN FOR S IGNAL I NTEGRITY 109 Circuit Design Issues Not Related to PCB Layout 109 Noise 109 Distortion .110 Frequency response 111 Issues Related to PBC Layout .111 Electromagnetic Interference and Cross Talk 111 Magnetic fi elds and inductive coupling 112 Loop inductance 115 Electric fi elds and capacitive coupling .117 Ground Planes and Ground Bounce 119 What ground is and what it is not 119 Ground (return) planes .122 Ground bounce and rail collapse .123 Split power and ground planes .125 PCB Electrical Characteristics 127 Characteristic impedance .127 Refl ections .133 Ringing .137 Electrically long traces 139 Critical length 142 Transmission line terminations 143 PCB Routing Topics .144 Parts placement for electrical considerations .145 PCB layer stack-up 146 Bypass capacitors and fanout 151 Trace width for current carrying capability 151 Trace width for controlled impedance 153 Trace spacing for voltage withstanding 163 Trace spacing to minimize cross talk (3w rule) .163 Traces with acute and 90º angles 164 Contents CHAPTER 7 M AKING AND E DITING C APTURE P ARTS .167 The Capture Part Libraries 167 Types of Packaging .168 Homogeneous parts .168 Heterogeneous parts 169 Pins .169 Part Editing Tools 170 The Select tool and settings .170 The pin tools 170 The graphics tools .171 The zoom tools 171 Constructing Capture Parts 171 Method 1: Constructing Parts Using the New Part Option (Design Menu) .172 Design example for a passive, homogeneous part 172 Design example for an active, multipart, homogeneous component 180 Assigning power pin visibility .183 Design example for a passive, heterogeneous part .184 Method 2: Constructing Parts with Capture Using the Design Spreadsheet .187 Method 3: Constructing Parts Using Generate Part from the Tools Menu 190 Method 4: Generating Parts with the PSpice Model Editor .192 Generating a Capture part library from a PSpice model library .193 Making and/or Obtaining PSpice Libraries for Making New Capture Parts .194 Downloading libraries and/or models from the Internet 195 Making a PSpice model from a Capture project .196 Adding PSpice templates (models) to preexisting Capture parts .206 Constructing Capture Symbols 208 Contents CHAPTER 8 M AKING AND E DITING L AYOUT F OOTPRINTS .211 Introduction to the Library Manager 211 Introduction to Layout’s Footprint Libraries and Naming Conventions 212 Layout’s footprint libraries .213 Naming conventions .213 The Composition of Footprints 217 Padstacks .217 Obstacles .218 Text 220 Datums and insertion origins .220 The Basic Footprint Design Process .221 Working with Padstacks .226 Accessing existing padstacks .227 Editing padstack properties from the spreadsheet 228 Saving footprints and padstacks .229 Footprint Design Examples 231 Design example 1: a surface-mount footprint design .232 Design example 2: a modifi ed through-hole footprint design 237 Using the Pad Array Generator 243 Introduction .243 Footprint design for PGAs 243 Footprint design for BGAs 248 Blind, buried, and microvias .258 Mounting holes .259 Printing a catalog of a footprint library 261 CHAPTER 9 PCB D ESIGN E XAMPLES 263 Overview of the Design Flow 264 Contents ixExample 1: Dual Power Supply, Analog Design .266 Initial design concept and preparation .267 Project setup and design in Capture .268 Defi ning the board requirements 285 Importing the design into Layout 288 Setting up the board 289 Prerouting the board 306 Autorouting the board .316 Finalizing the design .318 Example 2: Mixed Analog/Digital Design Using Split Power, Ground Planes .322 Mixed-signal circuit design in Capture 322 Power and ground connections to digital and analog parts .324 Connecting separate analog and digital grounds to a split plane 324 Using busses for digital nets 327 Defi ning the layer stack-up for split planes .328 Establishing a primary power plane 330 Creating split ground planes 334 Creating nested power planes with copper pours .336 Using anti-copper on plane layers .338 Setting up and running the autorouter 340 Moving a routed trace to a different layer .342 Adding ground planes and guard traces to routing layers .342 Defi ning vias for fl ood planes/pours .345 Setting the copper pour spacing .347 Stitching a ground plane manually .348 Using anti-copper obstacles on copper pours 349 Routing guard traces and rings .349 Example 3: Multipage, Multipower, and Multiground Mixed A/D PCB Design with PSpice 352 Project setup for PSpice simulation and Layout .354 Adding schematic pages to the design .356 Contents xUsing off-page connectors with wires 358 Using off-page connectors with busses 359 Setting up multiple-ground systems .359 Setting up PSpice sources .360 Performing PSpice simulations 361 Preparing the simulated project for Layout 364 Assigning a new technology fi le .365 Placing parts on the bottom (back) of a board .365 Layer stack-up for a multiground system .365 Net layer assignments 367 Through-hole and blind via setup .367 Fanning out a board with multiple vias 367 Overriding known errors in Layout .370 Autorouting with the DRC/route box 370 Using forced thermals to connect ground planes 372 Using the AutoECO to update a board from Capture 372 Example 4: High-Speed Digital Design 376 Layer setup for microstrip transmission lines .380 Via design for heat spreaders 381 Constructing a heat spreader with copper area obstacles 382 Using free vias as heat pipes .382 Determining critical trace length of transmission lines .387 Routing controlled impedance traces 388 Moated ground areas for clock circuits .390 Routing curved traces .390 Gate and pin swapping 392 Stitching a ground plane with the free via matrix .395 Miscellaneous Items 397 Fixing bad pad exits 397 Design cache—cleanup, replace, update .398 Adding test points 400 Types of AutoECOs .401 Contents xiMaking a custom Capture template 403 Making a custom Layout technology/template fi le .403 Using the Stackup Editor 404 Using the Stackup Editor with an active board design 404 Using the Stackup Editor to set up a custom technology or template fi le 407 Submitting stack-up drawings with Gerber fi les .408 Adding solder thieves .408 Printing a footprint catalog from a PCB design 409 CHAPTER 10 P OSTPROCESSING AND B OARD F ABRICATION 411 The Circuit Design with OrCAD 411 Schematic design in Capture 411 The board design with Layout .413 Postprocessing the design with Layout 414 Fabricating the Board .417 Choosing a board house .417 Setting up a user account .417 Submitting Gerber fi les and requesting a quote 418 Annotating the layer types and stack-up .419 Receipt inspection and testing .422 Nonstandard Gerber fi les .422 CHAPTER 11 A DDITIONAL T OOLS 423 Using PSpice to Simulate Transmission Lines .423 Simulating digital transmission lines 424 Simulating analog signals 427 Using Microsoft Excel with a Bill of Materials Generated by Capture 427 Using the SPECCTRA Autorouter with Layout 429 Contents xiiIntroduction to GerbTool 437 Opening a Layout-generated Gerber fi le with GerbTool 437 Making a .DRL fi le for a CNC machine .438 Panelization .443 Using the IPC-7351 Land Pattern Viewer 449 Using CAD Tools to 3-D Model a PCB 452 A PPENDICES Appendix A: Layout Technology Files .455 Appendix B: List of Design Standards .457 Appendix C: A Partial List of Packages and Footprints and Some of the Footprints Included in OrCAD Layout 459 Appendix D: Rise and Fall Times for Various Logic Families 471 Appendix E: Drill and Screw Dimensions 473 Appendix F: References by Subject .475 B IBLIOGRAPHY AND R EFERENCES 491 I NDEX 495 Contents Nếu các bạn chưa có tài khoản trangquynh.net, các bạn có thể đăng kí TẠI ĐÂY để tải tài liệu ngay bây giờ hoặc các bạn cũng có thể bấm VÀO ĐÂY để xem thêm các tài liệu khác. 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